JEDEC JESD80

Click here to purchase
The purpose of this standard is to provide a standard for 2.5 V nominal supply-voltage CMOS logic devices, for uniformity, multiplicity of sources, elimination of confusion, ease of device specification, and ease of use. This standard defines dc interface parameters and test loading for CMOS digital logic family based on 2.5 V (nominal) power supply levels at 2.5 V input tolerance.

Product Details

Published:

11/01/1999

Number of Pages:

8

File Size:

1 file , 69 KB