
JEDEC JEP159A
PROCEDURE FOR THE EVQLUQTION OF LOW-k/METAL INTER/INTRA-LEVEL DIELECTRIC INTEGRITY
standard by JEDEC Solid State Technology Association, 07/01/2015
PROCEDURE FOR THE EVQLUQTION OF LOW-k/METAL INTER/INTRA-LEVEL DIELECTRIC INTEGRITY
standard by JEDEC Solid State Technology Association, 07/01/2015
Addendum No. 2 to JESD79-3 – 1.35 V DDR3L-800, DDR3L-1066, DDR3L-1333, and DDR3L-1600
Amendment by JEDEC Solid State Technology Association, 10/01/2011
PROCUREMENT STANDARD FOR KNOWN GOOD DIE (KGD)
standard by JEDEC Solid State Technology Association, 10/01/2013
SUGGESTED PRODUCT-DOCUMENTATION, CLASSIFICATIONS, AND DISCLAIMERS
standard by JEDEC Solid State Technology Association, 07/01/1996
JOINT IPC/JEDEC STANDARD FOR ACOUSTIC MICROSCOPY FOR NONHERMETRIC ENCAPSULATED ELECTRONIC COMPONENTS
standard by JEDEC Solid State Technology Association, 05/01/1999
BOARD LEVEL CYCLIC BEND TEST METHOD FOR INTERCONNECT RELIABILITY CHARACTERIZATION OF COMPONENTS FOR HANDHELD ELECTRONIC PRODUCTS
standard by JEDEC Solid State Technology Association, 03/01/2006
LRDIMM DDR3 MEMORY BUFFER (MB)
standard by JEDEC Solid State Technology Association, 10/01/2014
EVALUATION PROCEDURE FOR DETERMINING CAPABILITY TO BOTTOM SIDE BOARD ATTACH BY FULL BODY SOLDER IMMERSION OF SMALL SURFACE MOUNT SOLID STATE DEVICES
standard by JEDEC Solid State Technology Association, 03/01/2018
Byte Addressable Energy Backed Interface
standard by JEDEC Solid State Technology Association, 09/01/2017
ADDENDUM No. 2 to JESD8 – STANDARD FOR OPERATING VOLTAGES AND INTERFACE LEVELS FOR LOW VOLTAGE EMITTER-COUPLED LOGIC (ECL) INTEGRATED CIRCUITS
standard by JEDEC Solid State Technology Association, 03/01/1993