
JEDEC JESD251-1
Addendum No. 1 to JESD251, Optional x4 Quad I/O With Data Strobe
Amendment by JEDEC Solid State Technology Association, 10/01/2018
Addendum No. 1 to JESD251, Optional x4 Quad I/O With Data Strobe
Amendment by JEDEC Solid State Technology Association, 10/01/2018
REQUIREMENTS FOR HANDLING ELECTROSTATIC-DISCHARGE-SENSITIVE (ESDS) DEVICES
standard by JEDEC Solid State Technology Association, 01/01/2012
THE MEASUREMENT OF TRANSISTOR NOISE FIGURE AT FREQUENCIES UP TO 20 kHz BY SINUSOIDAL SIGNAL-GENERATOR METHOD
standard by JEDEC Solid State Technology Association, 04/01/1968
0.6 V Low Voltage Swing Terminated Logic (LVSTL06)
standard by JEDEC Solid State Technology Association, 12/01/2016
RF Biased Life (RFBL) Test Method
standard by JEDEC Solid State Technology Association, 01/01/2013
TRANSISTOR, GALLIUM ARSENIDE POWER FET, GENERIC SPECIFICATION
standard by JEDEC Solid State Technology Association, 07/01/1992
FBDIMM Architecture and Protocol
standard by JEDEC Solid State Technology Association, 01/01/2007
SELECTION OF BURN-IN/LIFE TEST CONDITIONS AND CRITICAL PARAMETERS FOR QML MICROCIRCUITS
standard by JEDEC Solid State Technology Association, 09/01/2015
ADDENDUM No. 9 to JESD24 – SHORT CIRCUIT WITHSTAND TIME TEST METHOD
Amendment by JEDEC Solid State Technology Association, 08/01/1992
DDR3 SDRAM Specification
standard by JEDEC Solid State Technology Association, 07/01/2012