
JEDEC JESD 24-9 (R2002)
ADDENDUM No. 9 to JESD24 – SHORT CIRCUIT WITHSTAND TIME TEST METHOD
Amendment by JEDEC Solid State Technology Association, 08/01/1992
ADDENDUM No. 9 to JESD24 – SHORT CIRCUIT WITHSTAND TIME TEST METHOD
Amendment by JEDEC Solid State Technology Association, 08/01/1992
DDR3 SDRAM Specification
standard by JEDEC Solid State Technology Association, 07/01/2012
Universal Flash Storage Host Controller Interface (UFSHCI), Unified Memory Extension
standard by JEDEC Solid State Technology Association, 03/01/2016
NAND Flash Interface Interoperability
standard by JEDEC Solid State Technology Association, 07/01/2014
RECOMMENDED ESD-CDM TARGET LEVELS
standard by JEDEC Solid State Technology Association, 10/01/2009
STANDARD FOR DESCRIPTION OF 54/74ABTXXX AND 74BCXXX TTL-COMPATIBLE BiCMOS LOGIC DEVICES
standard by JEDEC Solid State Technology Association, 02/01/1996
STRESS-TEST-DRIVEN QUALIFICATION OF INTEGRATED CIRCUITS
standard by JEDEC Solid State Technology Association, 02/01/2011
APPLICATION SPECIFIC QUALIFICATION USING KNOWLEDGE BASED TEST METHODOLOGY
standard by JEDEC Solid State Technology Association, 10/01/2015
STANDARD DESCRIPTION OF 1.2 V CMOS LOGIC DEVICES (WIDE RANGE OPERATION)
standard by JEDEC Solid State Technology Association, 06/01/2001
PACKAGE WARPAGE MEASUREMENT OF SURFACE-MOUNT INTEGRATED CIRCUITS AT ELEVATED TEMPERATURE
standard by JEDEC Solid State Technology Association, 10/01/2009